MEMO'24:

International Workshop on Memory System, Management and Optimization

Nov 17, 2pm-5:30pm, Sunday, Atlanta, USA

Introduction | Topics | Dates | Organizers | Program Committee | Submission | Program

held in conjunction SC24: The International Conference on High Performance Computing, Networking, Storage and Analysis and in cooperation with IEEE Computer Society

Time/Date: 2:00PM - 5:30PM, Sunday, November 17, 2024

Location: the Georgia World Congress Center, Atlanta

Introduction

The growing disparity between computing speed and memory speed, commonly referred to as the memory wall problem, remains a critical and enduring challenge in the computing community. Recent developments, such as the expansion of the memory hierarchy and the increasingly blurred line between memory and storage, coupled with the introduction of new memory technologies, such as high-bandwidth memory, non-volatile memory, and disaggregated memory, further complicate the situation. The prevalence of heterogeneous computing, ongoing advancements in the memory hierarchy, and the rise of disaggregated architectures significantly broaden the scope of this challenge. Simultaneously, the proliferation of large machine learning (ML) models, graph processing applications, and traditional scientific applications facing bottlenecks due to memory latency, bandwidth, or capacity issues continue to drive researchers, professionals, and practitioners to enhance memory system design and memory management, overcome the constraints imposed by the memory wall, and facilitate high-performance memory-intensive applications.

Computer architecture, operating systems, storage systems, performance models, tools, and applications themselves are being enhanced or even redesigned to address the performance, programmability, and energy efficiency challenges of the increasingly complex and heterogeneous memory systems. Exploring the intersection of these research areas will enable cohesive and synergistic development and collaboration on the future of memory technologies, systems, and applications. Computer architecture and hardware systems, operating systems, storage and file systems, programming stack, performance models and tools are being enhanced, augmented, or even redesigned to address the performance, programmability, and energy efficiency challenges of the increasingly complex and heterogeneous memory systems for HPC and data-intensive applications.

Topics of Interest

This workshop aims to bring together computer science and computational science researchers, from industry, government labs and academia, concerned with the challenges of efficiently using existing and emerging memory systems. The term performance for memory systems is general, which includes latency, bandwidth, power consumption and reliability from the aspect of hardware memory technologies to how it is manifested in the application performance. The topics of interest include, but are not limited to:

Important Dates

Organizers

Program Committee

Submission and Review Process

Submission is Open. Login to SC’24 submission site, click ‘Make a New Submission’, choose MEMO’24. For SC24, IEEE is the SC proceeding publisher. Submissions must use the template of IEEE conference proceedings: two-column, US letter. The minimum number of pages is 5 pages, including references, and there is no upper limit of pages. IEEE will be providing a unique copyright submission site, and access to PDF eXpress to validate final pdfs. Additional guidelines, including the copyright notice for the camera-ready, will be provided at a later time. Camera ready papers are required to be formatted the same as the main conference papers. Each paper is expected to receive a minimum of 3 reviews. Double-blind peer-review will be used. Papers will be evaluated based on novelty, technical soundness, clarity of presentation, and impact. The Technical Program Committee reserves the right to reject incorrectly formatted papers.

Program

(2:00PM - 5:30PM, Sunday, November 17, 2024 @ the Georgia World Congress Center, Atlanta)

Invited Talk: Memory & Storage: The Power of HPC/AI

Speaker: Dr. Jongryool Kim (SK Hynix)

Bio:

Dr. Jongryool Kim is currently serving as the research director of AI System Infra team at SK hynix Inc., located in San Jose, California. He has been a part of the SK hynix since 2020, during which time he has been conducting research and development of numerous advanced projects such as custom HBM, CXL Pooled memory, computational CXL memory and storage, and object interface storage solution for AI/HPC systems. Additionally, he is a member of the Open Computing Project (OCP) Future Technology Initiative (FTI), working for the data-centric computing (DCC) workstream. Dr. Kim is also a Science Advisory Board (SAB) member of Semiconductor Research Corporation (SRC) JUMP 2.0. Prior to this role, he had served as the cloud system architect at Samsung Mobile division developing and operating a Samsung Cloud data analytics system that manages and analyzes data from all Samsung devices such as smart phones, wearable devices, and home appliances around the world. Additionally, he worked with various R&D teams at Samsung SW R&D Center. He conducted research to improve network and storage IO performance in High Performance Computing (HPC) and Cloud.

Technical Talk Session 1:

TBD

Technical Talk Session 2:

TBD